Title :
A new addressing mode for the encoding space problem on embedded processors
Author :
Youn, Jonghee M. ; Kim, Daeho ; Shin, Sechul ; Paek, Yunheung ; Cho, Jeonghun ; Ahn, Minwook ; Yoon, Jonghee W. ; Chae, Hochang
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
Abstract :
The complexity of today´s applications increases with various requirements such as execution time, code size or power consumption. To satisfy these requirements for performance, efficient instruction set design is one of the important issues because an instruction customized for specific applications can make better performance than multiple instructions in aspect of fast execution time, decrease of code size, and low power consumption. Limited encoding space, however, does not allow adding application-specific and complex instructions freely to our instruction set architecture. To resolve this problem, conventional architectures increases free space for encoding by trimming excessive bits required beyond the fixed word length. This approach however shows weakness in terms of the complexity of compiler, code size and execution time. In this paper, we propose a new instruction encoding scheme based on the dynamic implied addressing mode (DIAM) to resolve limited encoding space and side-effect by trimming. Our DIAM-based approach uses a special program memory to store extra encoding information. We also suggest a code generation algorithm to fully utilize the DIAM. In our experiment, the architecture augmented with DIAMs shows about 10% code size reduction and speed up on average, as compared to the base architecture without DIAMs.
Keywords :
embedded systems; microprocessor chips; reduced instruction set computing; code generation; code size; dynamic implied addressing mode; embedded processors; encoding space problem; execution time; instruction set architecture; instruction set design; Algorithm design and analysis; Application software; Computer science; Encoding; Energy consumption; Instruction sets; Performance analysis; Program processors; Space time codes;
Conference_Titel :
Application Specific Processors, 2009. SASP '09. IEEE 7th Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-4939-2
Electronic_ISBN :
978-1-4244-4938-5
DOI :
10.1109/SASP.2009.5226337