Effects of current density on electromigration resistance trace analysis

We propose in this work an analysis method to study electromigration degradation through void size evolution at the failure time. Electrical aging tests are performed to characterize electromigration (EM) failure phenomenon on Cu lines. We followed the impact of various applied stressing currents on void sizes at the time of failure through the resistance step increase (Rstep). Two major findings emerge from this study. First, the voids size distributions at the failure time show a bimodal behavior symptomatic of different voids sizes and locations. Secondly, the proportion of higher void size values increases with the stress current. In addition to the comprehension of electromigration void growth mechanisms; this simple method is particularly useful during process development to track voids occurring under via.