TCAD-based failure analysis and modeling of pit formation in GaN HEMTs

High field DC life testing of Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) has shown that degradation of the devices leads to the formation of morphological pits near the gate edges of the device, which have been proposed to be a cause of drain current collapse and threshold voltage shift. In order to test various proposed physical mechanisms of pit formation in GaN HEMTs, we have utilized the Silvaco ATLAS^©, ATHENA^© and DevEdit^© TCAD software packages to create a model of pit formation in the AlGaN layer corresponding to experimental observations. The model allows for multiple theories of pit formation to be tested by correlating progressive expansion of the pit area with quantities such as vertical electric field magnitude and thermal gradients. Utilizing vertical electric field as the impetus for pit formation, along with a set pit growth rate of 10 A/iteration, the simulation shows complete drain current collapse in three iterations, corresponding to 7×10³ hours of DC stress based on experimentally observed square-root growth of the pit area with time. Suggestions for further uses of the model for investigation of pit formation in GaN HEMTs are discussed in the conclusion.