DocumentCode
3198690
Title
Compact modeling and corner analysis of spintronic memristor
Author
Chen, Yiran ; Wang, Xiaobin
Author_Institution
Seagate Technol., Shakopee, MN, USA
fYear
2009
fDate
30-31 July 2009
Firstpage
7
Lastpage
12
Abstract
The 4th fundamental circuit elements - memristor received significant attentions after a real device was recently demonstrated for the first time. Besides the solid-state thin film memristive device, sprintonic memristor was also invented based on the magnetic technology. In this paper, we describe a compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism. Our proposed compact model can be easily implemented by Verilog-A language and compatible to SPICE-based simulation. Furthermore, we discuss the corner model generation of spintronic memristors to improve the simulation efficiency of large scale or complex circuitry, e.g., memory array or some analog circuit design. The process variation effects of the model parameters of are considered in the corner model of spintronic memristor.
Keywords
SPICE; analogue circuits; hardware description languages; magnetic domain walls; magnetoelectronics; micromechanical devices; thin film devices; SPICE-based simulation; Verilog-A language; analog circuit design; compact modeling; complex circuitry; corner analysis; corner model generation; magnetic-domain-wall motion mechanism; memory array; process variation effects; solid-state thin film memristive device; spintronic memristor; Circuit simulation; Hardware design languages; Magnetic analysis; Magnetic devices; Magnetic films; Magnetoelectronics; Memristors; Solid state circuits; Thin film circuits; Thin film devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures, 2009. NANOARCH '09. IEEE/ACM International Symposium on
Conference_Location
San Francisco, CA
Print_ISBN
978-1-4244-4957-6
Electronic_ISBN
978-1-4244-4958-3
Type
conf
DOI
10.1109/NANOARCH.2009.5226363
Filename
5226363
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