Thermal test vehicle for the validation of thermal modelling of hot spot dissipation in 3D stacked ICs

3D stacking of dies is a promising technique to allow miniaturization and performance enhancement of electronic systems. The complexity of the interconnection structures, combined with the reduced thermal spreading in the thinned dies and the poorly thermally conductive adhesives complicate the thermal behaviour of a stacked die structure. The same dissipation will lead to higher temperatures and a more pronounced temperature peak in a stacked die package compared to a single die package. Therefore, the thermal behaviour in a 3D-IC needs to be studied thoroughly. In this paper, a test vehicle to assess power dissipation in multiple hot spots and the thermal impact of TSVs, is presented. In this test vehicle, a stack of test chips with integrated heaters and temperature sensors is used to evaluate the steady state and transient temperature profile of multiple hot spots. With this experimental set-up, the thermal modelling of the 3D stacks is validated.