Title :
Electrical evaluation of wafer level fan out (WLFO) package using organic substrates for microwave applications
Author :
Lee, SeungJae ; Kim, SangWon ; Kim, Gawon ; Bae, KiCheol ; Yu, Jiheon ; Kim, JinYoung ; Yoo, HeeYeoul ; Lee, ChoonHeung
Author_Institution :
Amkor Technol. Korea, South Korea
Abstract :
In this paper, developments of wafer level fan-out (WLFO) technology using organic substrates, ajinomoto build-up film (ABF) with laser ablation process and buried pattern PCB, are introduced for low cost and high electrical performance not only on low frequency ranges but also microwave applications. WLFO technology using organic substrates can enhance routing density and provide smaller form factor than flip-chip chip scale packages (fcCSP). Moreover, short signal routing paths from die out to package out can be realized to improve overall electrical performance in WLFO, In this paper, the process of WLFO using ABF with laser drilling and buried-pattern PCB substrate are explained. In addition, measurements of coplanar waveguide (CPW) structure on WLFO and interconnection models from die I/O pad to balls using 3D EM simulation are conducted to estimate effectiveness in microwave ranges.
Keywords :
buried layers; coplanar waveguides; integrated circuit interconnections; laser ablation; wafer level packaging; 3D electromagnetic simulation; CPW; ajinomoto build-up film; buried-pattern PCB substrate; coplanar waveguide structure; die I/O pad; die out-package out; interconnection models; laser ablation; laser drilling; microwave applications; organic substrates; routing density; short signal routing paths; wafer level fan out package; Coplanar waveguides; Lithography; Plasmas; Substrates;
Conference_Titel :
Electronic System-Integration Technology Conference (ESTC), 2010 3rd
Conference_Location :
Berlin
Print_ISBN :
978-1-4244-8553-6
Electronic_ISBN :
978-1-4244-8554-3
DOI :
10.1109/ESTC.2010.5642956