Title :
Optimizing Sparse Matrix Operations on GPUs Using Merge Path
Author :
Dalton, Steven ; Baxter, Sean ; Merrill, Duane ; Olson, Luke ; Garland, Michael
Author_Institution :
Dept. of Comput. Sci., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
Abstract :
Irregular computations on large workloads are a necessity in many areas of computational science. Mapping these computations to modern parallel architectures, such as GPUs, is particularly challenging because the performance often depends critically on the choice of data-structure and algorithm. In this paper, we develop a parallel processing scheme, based on Merge Path partitioning, to compute segmented row-wise operations on sparse matrices that exposes parallelism at the granularity of individual nonzero entries. Our decomposition achieves competitive performance across many diverse problems while maintaining predictable behaviour dependent only on the computational work and ameliorates the impact of irregularity. We evaluate the performance of three sparse kernels: Spiv, Spaded and Sperm. We show that our processing scheme for each kernel yields comparable performance to other schemes in many cases and our performance is highly correlated, nearly 1, to the computational work irrespective of the underlying structure of the matrices.
Keywords :
graphics processing units; merging; parallel architectures; sparse matrices; GPUs; Spaded sparse kernels; Sperm sparse kernels; Spiv sparse kernels; individual nonzero entries; merge path partitioning; parallel architectures; parallel processing scheme; segmented row-wise operations; sparse matrix operations; Arrays; Graphics processing units; Instruction sets; Matrix decomposition; Parallel processing; Sorting; Sparse matrices; gpu; parallel; sorting; sparse matrix-matrix;
Conference_Titel :
Parallel and Distributed Processing Symposium (IPDPS), 2015 IEEE International
Conference_Location :
Hyderabad
DOI :
10.1109/IPDPS.2015.98