Localization of electrical defects in system in package devices using Lock-in Thermography

The paper deals with demonstration of Lock-in Thermography (LIT) as a new key-method for the defect localization in modern microelectronic devices. After an introduction into the operational principle and recent advantages of LIT, three different case studies for defect localization at multi-chip, flip-chip, and stacked die devices will be presented followed by physical root cause analysis, using mechanical cross sectioning and SEM investigations.