Petri net-based specification, analysis and synthesis of logic controllers

The logic control program is usually specified by drawing the Petri net in terms of interface with the electro-mechanical devices and the environment of the system. In such case it is not immediately evident that the control system behaves in a satisfactory way. Industrial engineers prefer frequently a form of specification, like interpreted Petri Net, sequential function chart (SFC), Grafcet or Grafchart. On the other hand, some popular techniques are informal and do not provide means to validate the design. In the paper, modelling, analysis and synthesis of logic controller described by Petri nets is presented. Additional, the use of design/CPN system for modelling, testing and analysis of logic controllers described by means of coloured, interpreted Petri nets is shown. The proposed methods are especially useful in designing of industrial application specific logic controller (ASLC) with FPGA