Fine pitch Cu/Sn solid state diffusion bonding for making high yield bump interconnections and its application in 3D integration

Low temperature stacking of dies for 3D integration has been gaining interest due to the thermal sensitivity of some advanced node devices such as DRAM. Sn-based solder joint is considered as a promising approach for making die to die interconnections because Sn to Cu bonding temperature is lower and the yield is higher as compared with Cu to Cu bonding. This paper presents a systematic study of Cu/Sn solid state diffusion bonding, during which the CuSn intermetallic compounds are formed by the solid state inter-diffusion. It is found that there is a lower-limit pressure of about 20 MPa below that there is no sufficient Sn plastic deformation to ensure good contact and electrical connection. However, 150 MPa is almost the upper-limit beyond which Sn will squeeze out much leading to electrical short between adjacent bumps. Surface cleaning or oxides removal is found to be another key factor for good bonding. Finally, this Cu/Sn solid state diffusion bonding together with Cu TSV are implemented into the 3D integration flow for making die to die vertical interconnection.