DocumentCode :
3203564
Title :
Flexible folded FIR filter architecture
Author :
Milentijevic, I. ; Ciric, V. ; Vojinovic, O.
Author_Institution :
Fac. of Electron. Eng., Nis Univ., Serbia
Volume :
2
fYear :
2004
fDate :
16-19 May 2004
Firstpage :
723
Abstract :
Configurable folded bit-plane architecture for FIR filtering that allows programming of both number of taps and coefficient length is proposed in this paper. Proposed architecture allows designing of flexible folded FIR filter array with fixed size that enables efficient implementation of different wireless standards on single filter. This paper deals with the mapping of unfolded data flow graph onto the configurable folded system using a new folding set assignment. The obtained architecture as a folded system is described by data flow graph, functional block diagram and data flow diagram.
Keywords :
FIR filters; mobile handsets; coefficient length; configurable folded bit-plane architecture; data flow diagram; data flow graph; flexible folded FIR filter architecture; functional block diagram; number of taps; wireless standards; Circuits; Computer architecture; Filtering; Finite impulse response filter; Flow graphs; Hardware; Peace technology; Silicon; Space technology; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2004. 24th International Conference on
Print_ISBN :
0-7803-8166-1
Type :
conf
DOI :
10.1109/ICMEL.2004.1314934
Filename :
1314934
Link To Document :
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