• DocumentCode
    3203850
  • Title

    Asymmetrical multiconnection three-stage Clos networks

  • Author

    Varma, Anujan ; Chalasani, Suresh

  • Author_Institution
    Dept. of Comput. Eng., California Univ., Sant Cruz, CA, USA
  • fYear
    1992
  • fDate
    23-26 Mar 1992
  • Firstpage
    411
  • Lastpage
    414
  • Abstract
    The authors study routing problems in a general class of asymmetrical three-stage Clos networks. This class covers many asymmetrical three-stage networks considered by earlier researchers. They derive necessary and sufficient conditions under which this class of networks is rearrangeable with respect to a set of multiconnections, that is, connections where the paired entities are not limited to single terminals but can be arbitrary subsets of the terminals. They model the routing problem in these networks as a network-flow problem. If the number of switching elements in the first and last stages of the network is O(f) and the number of switching elements in the middle stage is m, then the network-flow model yields a routing algorithm with running time O(mf3)
  • Keywords
    circuit switching; multiprocessor interconnection networks; network routing; parallel algorithms; switching theory; asymmetrical three-stage Clos networks; multiconnection three-stage Clos networks; necessary and sufficient conditions; network-flow problem; routing algorithm; routing problem; running time; switching elements; Communication switching; Computer networks; Data communication; Hardware; Routing; Scientific computing; Sufficient conditions; Switches; Telephony; Wavelength division multiplexing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing Symposium, 1992. Proceedings., Sixth International
  • Conference_Location
    Beverly Hills, CA
  • Print_ISBN
    0-8186-2672-0
  • Type

    conf

  • DOI
    10.1109/IPPS.1992.223010
  • Filename
    223010