Power dissipation and gate number reduction of a utilized register, replaced by equivalent counters

This paper proposes a new method to replace registers with some equivalent counters and consequently to reduce power dissipation and gate numbers without any loss in the original data. If any set of frequent zeros or ones have at least five original members, these counters calculate the number of consecutive zeros or ones in the register and save them instead of the original sequence. This method is an extended form of Run-Length encoding method when input data is only one and zero and can be used to compress delta-sigma signals and to increase effective channel bandwidth, for instance in USB communication. Two examples arc given to illustrate the efficiency of this approach.