Memory requirements to balance thus asymptotically full-speedup FFT computation on processor arrays

The paper proves that for a linearly-connected array of α processors or a mesh-connected array of α² processors, where each processor has computation bandwidth C, I/O bandwidth I and C/I=logm, Ω(m^α) memory size is required in each processor to minimize the I/O requirement in balancing the FFT computation. Then it presents balanced FFT algorithms on these arrays to meet their memory size lower bounds. These algorithms are time optimal exhibiting full speedups