Variable fractional digital delay filter on reconfigurable hardware

This paper describes a design for a variable fractional delay (VFD) FIR filter implemented on reconfigurable hardware. Fractionally delayed signals are required for several audio-based applications, including echo cancellation and musical signal analysis. Traditionally, VFD FIR filters are implemented using a complex, fixed structure based upon the order of the filter. This fixed structure restricts the range of valid fractional delay values permitted by the filter. The proposed design in this paper implements an order-scalable FIR filter, permitting fractionally delayed signals of widely varying integer sizes. This design builds upon the traditional Lagrange interpolator FIR filter using either a software-based or hardware-based Lagrange coefficient computational unit. Using today´s (2012) low-cost high performance reconfigurable hardware FIR coefficients can be computed fast enough for real-time variable fractional delay applications. The resulting real-time VFD FIR filter is tested using the Xilinx System Generator toolkit as well as Xilinx ISE and ModelSim. The proposed filter was functionally verified using ModelSim and System Generator.