DocumentCode
3205530
Title
Efficient fault emulation based on post-injection fault effect analysis (PIFEA)
Author
Grinschgl, Johannes ; Krieg, Armin ; Steger, Christian ; Weiss, Reinhold ; Bock, Holger ; Haid, Josef
Author_Institution
Inst. for Tech. Inf., Graz Univ. of Technol., Graz, Austria
fYear
2012
fDate
5-8 Aug. 2012
Firstpage
526
Lastpage
529
Abstract
Over the last years the complexity of SoC´s has increased enormously. This increase leads to a high test effort against faults. Therefore, methods have been developed to speed-up fault testing to cope with the increasing number of possible faults. One method is to emulate fault attacks. To cope with the large amount of test data a method to check automatically if a fault injection was successful is required. In this paper a novel method is presented how automatically, on a fault emulation platform, can be proven if a fault forces the system to unintended behavior. The PIFEA hardware block is designed to check if the system execution flow is manipulated or if the system detects the fault and switches in a secure mode.
Keywords
fault diagnosis; system-on-chip; PIFEA hardware block; SoC; fault emulation platform; post-injection fault effect analysis; speed-up fault testing; test data; Emulation; Field programmable gate arrays; Hardware; Radiation detectors; Security; System-on-a-chip; Testing; automatic test pattern injection; fault emulation; fault injection controller; multi-bit faults; saboteurs;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
Conference_Location
Boise, ID
ISSN
1548-3746
Print_ISBN
978-1-4673-2526-4
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2012.6292073
Filename
6292073
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