A test machine for digital VLSI circuits fabricated through MOSIS. [Student project]

Author

Fields, Thomas A. ; Stroud, Charles E.

Author_Institution

Lexmark Int. Inc., Lexington, KY, USA

fYear

1995

fDate

8-10 Aug. 1995

Firstpage

385

Lastpage

389

Abstract

The design, construction, and operation of a PC based test machine is described which is used to test digital VLSI devices fabricated through MOSIS. This test machine is capable of detecting gate and transistor level, single and multiple stuck-at faults. The test machine was developed as a senior design project in electrical engineering to provide students with experience in team based design of complete systems as well as the fundamental concepts of manufacture testing and diagnosis of VLSI and digital systems.

Keywords

MOS digital integrated circuits; VLSI; application specific integrated circuits; automatic test equipment; automatic test software; design for testability; electronic engineering education; fault diagnosis; fault location; integrated circuit packaging; integrated circuit testing; logic testing; student experiments; ASIC testing; MOSIS; digital VLSI circuits; gate level faults; hardware design; machine architecture; multiple stuck-at faults; personal computer based test machine; single stuck-at faults; software design; student design project; transistor level faults; Application specific integrated circuits; Circuit testing; Computer architecture; Hardware; Integrated circuit testing; Manufacturing; Packaging machines; Software testing; System testing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

AUTOTESTCON '95. Systems Readiness: Test Technology for the 21st Century. Conference Record

Conference_Location

Atlanta, GA, USA

Print_ISBN

0-7803-2621-0

Type

conf

DOI

10.1109/AUTEST.1995.522700

Filename

522700