Fully Depleted SOI Characterization by Capacitance Analysis of p-i-n Gated Diodes

Author

Navarro, C. ; Bawedin, M. ; Andrieu, F. ; Cluzel, Jacques ; Cristoloveanu, S.

Author_Institution

Inst. d´Electron. du Sud, Univ. of Montpellier II, Montpellier, France

Volume

36

Issue

1

fYear

2015

fDate

Jan. 2015

Firstpage

5

Lastpage

7

Abstract

Split capacitance measurements in thin SOI p-i-n gated diodes are performed and discussed. Contrarily to MOSFETs, the n⁺ and p⁺ contacts of the diode supply instantly minority and majority carriers preventing parasitic deep-depletion and transient effects. The gated diode enables accurate characterization from accumulation to strong inversion. We demonstrate that the diode capacitance curves provide extensive information, such as layer thickness and threshold voltage for both n- and p-type MOSFETs simultaneously. The experimental results are validated and explained through numerical simulations.

Keywords

MOSFET; minority carriers; p-i-n diodes; silicon-on-insulator; diode capacitance curves; fully depleted SOI characterization; layer thickness; majority carriers; minority carriers; n-type MOSFET; n⁺ contacts; p-type MOSFET; p⁺ contacts; split capacitance measurements; thin p-i-n gated diodes; threshold voltage; Capacitance; Capacitance measurement; Films; Logic gates; MOSFET; P-i-n diodes; Threshold voltage; Capacitance; SOI; film thickness; gated diode; inter-gate coupling; p-i-n; threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2014.2368596

Filename

6949617