Abstract :
The following topics were dealt with: path and branch prediction; power and thermal management; SMT; security; network-on-chip; microarchitecture modeling and analysis; code analysis and optimisation; DRAM; parallel architectures; reliability and validation.
Keywords :
DRAM chips; cache storage; codes; network-on-chip; optimisation; parallel architectures; security; DRAM; SMT; branch prediction; code analysis; microarchitecture analysis; microarchitecture modeling; network-on-chip; optimisation; parallel architectures; path prediction; power management; reliability; security; thermal management; validation;
Conference_Titel :
High Performance Computer Architecture, 2008. HPCA 2008. IEEE 14th International Symposium on
Conference_Location :
Salt Lake City, UT
Print_ISBN :
978-1-4244-2070-4
DOI :
10.1109/HPCA.2008.4658619
