DocumentCode :
3206718
Title :
Prediction of CPU idle-busy activity pattern
Author :
Diao, Qian ; Song, Justin
Author_Institution :
Intel Corp., Santa Clara, CA
fYear :
2008
fDate :
16-20 Feb. 2008
Firstpage :
27
Lastpage :
36
Abstract :
Real-world workloads rarely saturate multi-core processor. CPU C-states can be used to reduce power consumption during processor idle time. The key unsolved problem is: when and how to use which C-state. We propose a machine learning prediction method and usage model. We evaluate this model with idle traces collected on dual-core and quad-core processor, and find this method can well predict CPUpsilas activity pattern at the error level not exceeding 4%. Compared with existing OS C-state policy, it results in 12% additional CPU power saving and 2% performance improvement. In industry, 12% power saving for any processor is very significant improvement. SPECWeb (which we used consists of 3 different benchmarks - We consistently see doubledigit power saving) is representative ldquofront-endrdquo server workload - it takes >60% DP server market segment share.
Keywords :
learning (artificial intelligence); multiprocessing systems; CPU idle-busy activity pattern; dual-core processor; machine learning prediction method; multicore processor; power consumption reduction; processor idle time; quad-core processor; Delay; Hardware; Hidden Markov models; Inference algorithms; Machine learning algorithms; Multicore processing; Packaging; Power system modeling; Prediction methods; Predictive models;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computer Architecture, 2008. HPCA 2008. IEEE 14th International Symposium on
Conference_Location :
Salt Lake City, UT
ISSN :
1530-0897
Print_ISBN :
978-1-4244-2070-4
Type :
conf
DOI :
10.1109/HPCA.2008.4658625
Filename :
4658625
Link To Document :
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