DocumentCode
3206959
Title
Single-level integrity and confidentiality protection for distributed shared memory multiprocessors
Author
Rogers, Brian ; Yan, Chenyu ; Chhabra, Siddhartha ; Prvulovic, Milos ; Solihin, Yan
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC
fYear
2008
fDate
16-20 Feb. 2008
Firstpage
161
Lastpage
172
Abstract
Multiprocessor computer systems are currently widely used in commercial settings to run critical applications. These applications often operate on sensitive data such as customer records, credit card numbers, and financial data. As a result, these systems are the frequent targets of attacks because of the potentially significant gain an attacker could obtain from stealing or tampering with such data. This provides strong motivation to protect the confidentiality and integrity of data in commercial multiprocessor systems through architectural support. Architectural support is able to protect against software-based attacks, and is necessary to protect against hardware-based attacks. In this work, we propose architectural mechanisms to ensure data confidentiality and integrity in Distributed Shared Memory multiprocessors which utilize a point-to-point based interconnection network. Our approach improves upon previous work in this area, mainly in the fact that our approach reduces performance overheads by significantly reducing the amount of cryptographic operations required. Evaluation results show that our approach can protect data confidentiality and integrity in a 16-processor DSM system with an average overhead of 1.6% and a maximum of only 7% across all SPLASH-2 applications.
Keywords
cryptography; data integrity; data privacy; distributed shared memory systems; multiprocessor interconnection networks; SPLASH-2 application; architectural support; confidentiality protection; credit card number; cryptographic operation; customer record; data integrity; data stealing; data tampering; distributed shared memory multiprocessors; financial data; hardware-based attack; multiprocessor computer systems; performance overhead; point-to-point based interconnection network; sensitive data; single-level integrity; software-based attack; Application software; Computer security; Credit cards; Cryptography; Data security; Distributed computing; Hardware; Large-scale systems; Multiprocessing systems; Protection;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computer Architecture, 2008. HPCA 2008. IEEE 14th International Symposium on
Conference_Location
Salt Lake City, UT
ISSN
1530-0897
Print_ISBN
978-1-4244-2070-4
Type
conf
DOI
10.1109/HPCA.2008.4658636
Filename
4658636
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