DocumentCode :
3207068
Title :
Regional congestion awareness for load balance in networks-on-chip
Author :
Gratz, Paul ; Grot, Boris ; Keckler, Stephen W.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX
fYear :
2008
fDate :
16-20 Feb. 2008
Firstpage :
203
Lastpage :
214
Abstract :
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use either oblivious or adaptive routing algorithms to determine the route taken by a packet to its destination. Despite somewhat higher implementation complexity, adaptive routing enjoys better fault tolerance characteristics, increases network throughput, and decreases latency compared to oblivious policies when faced with non-uniform or bursty traffic. However, adaptive routing can hurt performance by disturbing any inherent global load balance through greedy local decisions. To improve load balance in adapting routing, we propose Regional Congestion Awareness (RCA), a lightweight technique to improve global network balance. Instead of relying solely on local congestion information, RCA informs the routing policy of congestion in parts of the network beyond adjacent routers. Our experiments show that RCA matches or exceeds the performance of conventional adaptive routing across all workloads examined, with a 16% average and 71% maximum latency reduction on SPLASH-2 benchmarks running on a 49-core CMP. Compared to a baseline adaptive router, RCA incurs a negligible logic and modest wiring overhead.
Keywords :
multiprocessor interconnection networks; network-on-chip; NoC; adapting routing; global network balance; interconnection networks-on-chip; load balance; regional congestion awareness; Delay; Fault tolerance; Logic; Multiprocessor interconnection networks; Network-on-a-chip; Routing; System-on-a-chip; Telecommunication traffic; Throughput; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computer Architecture, 2008. HPCA 2008. IEEE 14th International Symposium on
Conference_Location :
Salt Lake City, UT
ISSN :
1530-0897
Print_ISBN :
978-1-4244-2070-4
Type :
conf
DOI :
10.1109/HPCA.2008.4658640
Filename :
4658640
Link To Document :
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