100 Gbit/s scrambler architectures for OTN protocol: FPGA implementation and result comparison

Author

Salvador, Arley ; Corso, Valentino

Author_Institution

CPqD R&D Center in Telecommun., Campinas, Brazil

fYear

2012

fDate

5-8 Aug. 2012

Firstpage

904

Lastpage

907

Abstract

This paper describes and compares two scrambler architectures developed and implemented in an advanced field programmable gate array (FPGA), with applications in 100 Gbit/s optical transport network (OTN) systems.

Keywords

field programmable gate arrays; optical fibre networks; protocols; FPGA; OTN protocol; OTN system; bit rate 100 Gbit/s; field programmable gate array; optical transport network; scrambler architecture; Clocks; Combinational circuits; Field programmable gate arrays; Frequency modulation; Generators; Polynomials; Registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on

Conference_Location

Boise, ID

ISSN

1548-3746

Print_ISBN

978-1-4673-2526-4

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2012.6292167

Filename

6292167

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3207311