DocumentCode :
320824
Title :
Hierarchical characterization of analog integrated CMOS circuits
Author :
Eckmüller, Josef ; Gropl, Martin ; Gräb, Helmut
Author_Institution :
Siemens Semicond., Munich, Germany
fYear :
1998
fDate :
23-26 Feb 1998
Firstpage :
636
Lastpage :
643
Abstract :
This paper presents a new method for hierarchical characterization of analog integrated circuits. For each circuit class, a fundamental set of performances is defined and extracted topology-independently. A circuit being characterized is decomposed in general subcircuits. Sizing rules of these topology-independent subcircuits are included into the characterization by functional constraints. In this way, bad circuit sizing is detected and located
Keywords :
CMOS analogue integrated circuits; circuit CAD; circuit analysis computing; integrated circuit design; analog integrated CMOS circuits; circuit decomposition; circuit sizing; functional constraints; hierarchical characterization; topology-independent subcircuits; Analog circuits; CMOS analog integrated circuits; Circuit optimization; Circuit simulation; Circuit topology; Computational modeling; Electronic design automation and methodology; Mirrors; Numerical simulation; Performance gain;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 1998., Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-8359-7
Type :
conf
DOI :
10.1109/DATE.1998.655925
Filename :
655925
Link To Document :
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