Efficient DC fault simulation of nonlinear analog circuits

This paper describes a method to improve the efficiency of nonlinear DC fault simulation. The method uses the Newton-Raphson algorithm to simulate each faulty circuit. The key idea is to order the given list of faults in such a way that the solution of previous faulty circuit can serve as a good initial point for the simulation of the next faulty circuit. To build a good ordering, one step Newton-Raphson iteration is performed for all the faulty circuits once, and the results are used to quantify how faulty circuits and the good circuit are close in their behaviors. With one-step Newton-Raphson iteration implemented by Householder´s formula, the proposed method has virtually no overhead. Experimental results on a set of 36 MCNC benchmark circuits show an average speedup of 4.4 and as high as 15 over traditional stand-alone fault simulation