• DocumentCode
    320903
  • Title

    A fully additive, polymeric process for the fabrication and assembly of substrate and component level packaging

  • Author

    Gallagher, Catherine ; Gandhi, Pradeep ; Matijasevic, Goran

  • Author_Institution
    Ormet Corp., Carlsbad, CA, USA
  • fYear
    1997
  • fDate
    26-30 Oct 1997
  • Firstpage
    56
  • Lastpage
    63
  • Abstract
    A novel base technology that is applicable to all major packaging and redistribution elements in an electronic module is presented. A single family of polymer/metal composite conductors can be used for chip packaging redistribution layers, MCM or multilayer PWB interconnects, and SMT assembly. High density multilayer circuits with landless blind and buried vias can be fabricated by filling conductor paste into photoimaged dielectrics and thermal processing. Via layers are prepared directly on the inherently planarized circuit layer in identical fashion. Building up layers sequentially in this manner results in multilayer circuits built on a single substrate layer and minimizes the number of interfaces between dissimilar materials. As these composite materials are applied in an additive fabrication method, metal substrates can be employed for high thermal dissipation and excellent CTE control over a wide temperature range. Two variants of the composite conductor can successfully replace solder for surface mount and chip on board assembly. These reliable, highly thermally and electrically conductive materials are compatible with standard metal finishes and can be adopted piecemeal as desired; however, the largest reliability and cost benefit is realized when all of the elements are used in conjunction. The conductor materials are based on interpenetrating polymer and metal networks that are formed in situ from metal particles and a thermosetting flux/binder
  • Keywords
    assembling; circuit reliability; cooling; dielectric thin films; encapsulation; integrated circuit packaging; multichip modules; particle reinforced composites; photolithography; polymer films; printed circuit manufacture; surface mount technology; thermal expansion; CTE control; MCM interconnects; SMT assembly; additive fabrication method; additive polymeric process; assembly; chip on board assembly; chip packaging redistribution layers; component level packaging; composite conductor; composite materials; conductor paste filling; cost benefit; dissimilar material interfaces; electrically conductive materials; electronic module; fabrication; interpenetrating polymer/metal networks; landless blind vias; landless buried vias; metal finishes; metal particles; metal substrates; multilayer PWB interconnects; multilayer circuits; photoimaged dielectrics; planarized circuit layer; polymer/metal composite conductors; redistribution elements; reliability; sequential layer build-up; solder replacement; substrate level packaging; surface mount assembly; thermal dissipation; thermal processing; thermally conductive materials; thermosetting flux/binder; via layers; Additives; Assembly; Circuits; Conducting materials; Dielectric substrates; Electronic packaging thermal management; Fabrication; Nonhomogeneous media; Polymers; Thermal conductivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Polymeric Electronics Packaging, 1997. Proceedings., The First IEEE International Symposium on
  • Conference_Location
    Norrkoping
  • Print_ISBN
    0-7803-3865-0
  • Type

    conf

  • DOI
    10.1109/PEP.1997.656473
  • Filename
    656473