DocumentCode :
3209154
Title :
Techniques for efficient processing in runahead execution engines
Author :
Mutlu, Onur ; Kim, Hyesoon ; Patt, Yale N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, TX, USA
fYear :
2005
fDate :
4-8 June 2005
Firstpage :
370
Lastpage :
381
Abstract :
Runahead execution is a technique that improves processor performance by pre-executing the running application instead of stalling the processor when a long-latency cache miss occurs. Previous research has shown that this technique significantly improves processor performance. However, the efficiency of runahead execution, which directly affects the dynamic energy consumed by a runahead processor, has not been explored. A runahead processor executes significantly more instructions than a traditional out-of-order processor, sometimes without providing any performance benefit, which makes it inefficient. In this paper, we describe the causes of inefficiency in runahead execution and propose techniques to make a runahead processor more efficient, thereby reducing its energy consumption and possibly increasing its performance. Our analyses and results provide two major insights: (1) the efficiency of runahead execution can be greatly improved with simple techniques that reduce the number of short, overlapping, and useless runahead periods, which we identify as the three major causes of inefficiency; (2) simple optimizations targeting the increase of useful prefetches generated in runahead mode can increase both the performance and efficiency of a runahead processor. The techniques we propose reduce the increase in the number of instructions executed due to runahead execution from 26.5% to 6.2%, on average, without significantly affecting the performance improvement provided by runahead execution.
Keywords :
cache storage; instruction sets; performance evaluation; power consumption; dynamic energy; energy consumption; long-latency cache miss; out-of-order processor; runahead execution engines; runahead processor; Application software; Clocks; Delay; Energy consumption; Engines; Out of order; Performance analysis; Prefetching; Process design; Terminology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 2005. ISCA '05. Proceedings. 32nd International Symposium on
ISSN :
1063-6897
Print_ISBN :
0-7695-2270-X
Type :
conf
DOI :
10.1109/ISCA.2005.49
Filename :
1431571
Link To Document :
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