DocumentCode
3209288
Title
Hardware implementations of multi-layer feedforward neural networks and error backpropagation using 8-bit PIC microcontrollers
Author
Tang, J. ; Varley, M.R. ; Peak, M.S.
Author_Institution
Dept. of Electr. & Electron. Eng., Central Lancashire Univ., Preston, UK
fYear
1997
fDate
35559
Firstpage
42401
Lastpage
42405
Abstract
This paper describes the authors´ recent development work involving the use of EPROM-based microcontrollers for implementation of artificial neural networks. The microcontrollers used are selected from the PIC family of devices, which are 8-bit devices employing a reduced instruction set computer (RISC) and Harvard architectures. The primary motivation for this work is to develop implementations of small neural networks which are simple to understand and experiment with, enabling them to be used as aids in the undergraduate teaching of neural networks and in demonstrations of their basic principles. Practical issues are addressed and results are presented for implementations of a single neuron and a small feedforward neural network. In each case on chip training is incorporated using the delta rule and the error backpropagation algorithm respectively. Proposals for hardware implementations of larger networks are included
Keywords
feedforward neural nets; 8-bit PIC microcontrollers; EPROM-based microcontrollers; Harvard architectures; artificial neural networks; delta rule; error backpropagation; feedforward neural network; hardware implementations; multilayer feedforward neural networks; reduced instruction set computer; undergraduate teaching;
fLanguage
English
Publisher
iet
Conference_Titel
Neural and Fuzzy Systems: Design, Hardware and Applications (Digest No: 1997/133), IEE Colloquium on
Conference_Location
London
Type
conf
DOI
10.1049/ic:19970731
Filename
643115
Link To Document