DocumentCode
3209769
Title
Low-complexity algorithms for static cache locking in multitasking hard real-time systems
Author
Puaut, Isabelle ; Decotigny, David
Author_Institution
IRISA, Rennes, France
fYear
2002
fDate
2002
Firstpage
114
Lastpage
123
Abstract
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slow main memories. However, they are a source of predictability problems because of their dynamic and adaptive behavior and thus need special attention to be used in hard-real time systems. A lot of progress has been achieved in the last ten years to statically predict the worst-case behavior of applications with respect to caches in order to determine safe and precise bounds on task worst-case execution times (WCETs) and cache-related preemption delays. An alternative approach to cope with caches in real-time systems is to statically lock their contents such that memory access times and cache-related preemption times are predictable. In this paper, we propose two low-complexity algorithms for selecting the contents of statically-locked caches. We evaluate their performances and compare them with those of a state of the art static cache analysis method.
Keywords
cache storage; computational complexity; multiprogramming; real-time systems; timing; adaptive behavior; cache memories; cache-related preemption delays; cache-related preemption times; dynamic behavior; low-complexity algorithms; memory access times; multitasking hard real-time systems; performance evaluation; predictability; static cache locking; worst-case execution times; Bridges; Cache memory; Costs; Delay; Interference; Multitasking; Performance analysis; Performance evaluation; Real time systems; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Real-Time Systems Symposium, 2002. RTSS 2002. 23rd IEEE
ISSN
1052-8725
Print_ISBN
0-7695-1851-6
Type
conf
DOI
10.1109/REAL.2002.1181567
Filename
1181567
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