DocumentCode
3210617
Title
Static Power Consumption in Nano-CMOS Circuits: Physics and Modelling
Author
Kuzmicz, W. ; Piwowarska, E. ; Pfitzner, A. ; Kasprowicz, D.
Author_Institution
Warsaaw Univ. of Technol., Warsaw
fYear
2007
fDate
21-23 June 2007
Firstpage
163
Lastpage
168
Abstract
Static power consumption due to excessive leakage currents is a major problem in CMOS digital ICs with gate lengths of 90 nm and below. In this paper the physics and modelling of these currents is discussed, with special emphasis on variability and its effect on the statistical spread of the static power consumption and total power consumption.
Keywords
CMOS digital integrated circuits; leakage currents; nanoelectronics; CMOS digital IC; leakage currents; nano-CMOS circuits; static power consumption; CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Energy consumption; Leakage current; Physics; Semiconductor device modeling; Subthreshold current; Threshold voltage; Tunneling; CMOS; Leakage; Static power; Variability;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES '07. 14th International Conference on
Conference_Location
Ciechocinek
Print_ISBN
83-922632-9-4
Electronic_ISBN
83-922632-9-4
Type
conf
DOI
10.1109/MIXDES.2007.4286142
Filename
4286142
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