DocumentCode
3210710
Title
A Heuristic Approach to System-Level Design Problems
Author
Pulka, Andrzej
Author_Institution
Silesian Univ. of Technol., Gliwice
fYear
2007
fDate
21-23 June 2007
Firstpage
189
Lastpage
194
Abstract
The paper concerns the problem of system level design i.e. generation of high quality abstract models of modern electronic embedded systems for simulation, verification and technology mapping. The work focuses on methodology and AI techniques that can be incorporated to CAD tools. The main effort has been done on formulation of the algorithm and inference engine that controls the process of SoC modeling. The presented methodology binds AI techniques and formal verification methods with complex digital systems modeling. The author´s SMOG algorithm is briefly recalled as a basis for the presented approach. Then the algorithm modifications are proposed. Some aspects of the implementation of the method in PROLOG are emphasized. The results and conclusions summarize the work.
Keywords
CAD; embedded systems; formal verification; inference mechanisms; system-on-chip; AI techniques; CAD tools; PROLOG; SoC modeling; digital systems modeling; electronic embedded systems; formal verification methods; heuristic approach; inference engine; system-level design problems; Artificial intelligence; Design automation; Digital systems; Embedded system; Engines; Formal verification; Inference algorithms; Paper technology; Process control; System-level design; AI techniques; Design reuse; System-level design; SystemC; Transaction level modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES '07. 14th International Conference on
Conference_Location
Ciechocinek
Print_ISBN
83-922632-9-4
Electronic_ISBN
83-922632-9-4
Type
conf
DOI
10.1109/MIXDES.2007.4286148
Filename
4286148
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