DocumentCode :
3210852
Title :
Analysis of Basic Pausable Local Clock Signal Generator
Author :
Sobczyk, A. ; Luczyk, A.W. ; Pleskacz, W.A.
Author_Institution :
Warsaw Univ. of Technol., Warsaw
fYear :
2007
fDate :
21-23 June 2007
Firstpage :
237
Lastpage :
242
Abstract :
In this paper local clock signal generator basing on three different ring oscillators is discussed. The structure was designed to verify possibility of local clock signal generation using basic delay stages. General simulations were performed to analyze power dissipation and stability of frequency in regard to temperature, transistor model and layout extraction parameters. All circuits were designed in standard CMOS 0.35 mum technology.
Keywords :
CMOS integrated circuits; circuit simulation; delays; frequency stability; integrated circuit design; oscillators; signal generators; delay stages; frequency stability; layout extraction parameters; local clock signal generator; power dissipation; ring oscillators; size 0.35 mum; standard CMOS technology; temperature parameter; transistor model; Analytical models; CMOS technology; Circuit simulation; Clocks; Delay; Performance analysis; Ring oscillators; Signal analysis; Signal design; Signal generators; Delay stages; Local clock generation; Ring oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES '07. 14th International Conference on
Conference_Location :
Ciechocinek
Print_ISBN :
83-922632-9-4
Electronic_ISBN :
83-922632-9-4
Type :
conf
DOI :
10.1109/MIXDES.2007.4286157
Filename :
4286157
Link To Document :
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