Title :
PMOS NBTI-induced circuit mismatch in advanced technologies
Author :
Agostinelli, M. ; Lau, S. ; Pae, S. ; Marzolf, P. ; Muthali, H. ; Jacobs, S.
Author_Institution :
Technol. Dev. Q&R, Intel Corp., Hillsboro, OR, USA
Abstract :
PMOS transistor degradation due to Negative Bias Temperature Instability (NBTI) has proven to be a significant concern to present CMOS technologies. This is of particular concern for analog applications where the ability to match device characteristics to a high precision is critical. Analog circuits use larger than minimum device dimensions to minimize the effects of process variation, leaving PMOS NBTI as a possible performance limiter. This paper examines the effect of PMOS NBTI induced mismatch on analog circuits in a 90nm technology.
Keywords :
CMOS analogue integrated circuits; CMOS integrated circuits; integrated circuit reliability; 90 nm; PMOS NBTI-induced circuit mismatch; advanced technologies; analog circuits; negative bias temperature instability; Analog circuits; Bonding; CMOS technology; Degradation; Hydrogen; Interface states; Niobium compounds; Stress; Threshold voltage; Titanium compounds;
Conference_Titel :
Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
Print_ISBN :
0-7803-8315-X
DOI :
10.1109/RELPHY.2004.1315319
