Title :
Probabilistic diagnosis in wafer-scale systems
Author :
Somani, Arun K. ; Wang, Jian
Author_Institution :
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Abstract :
Studies fault diagnosis based on a realistic probabilistic model for wafer-scale multiprocessor systems. In this model, an individual processor fails independently with probability p. The authors use a comparison testing approach. The testing is performed in multiple stages by the processors. They assume that different testing tasks are executed in different stages, and the coverage of each testing task is imperfect and is represented by a parameter cv. Imperfect coverage can be used to model intermittent faults where individual test may be incapable of detecting a fault. The authors present an efficient distributed self-diagnosis algorithm that probabilistically identifies faulty and fault free units. They show that our algorithm achieves very high accuracy even when the system is sparsely interconnected, and a large number of faulty units are present in the system
Keywords :
VLSI; failure analysis; fault location; probability; comparison testing; coverage; distributed self-diagnosis algorithm; fault free units; intermittent faults; probabilistic model; wafer-scale systems; Clustering algorithms; Computer science; Fault detection; Fault diagnosis; Multiprocessing systems; Performance evaluation; Semiconductor device modeling; System testing; Upper bound; Wafer scale integration;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1992. Proceedings., 1992 IEEE International Workshop on
Conference_Location :
Dallas, TX
Print_ISBN :
0-8186-2837-5
DOI :
10.1109/DFTVS.1992.224378