Title :
Accelerated fault simulation utilizing multiple-fault propagation
Author :
Xing, Y. ; van Brakel, G. ; Kerkhoff, H.G.
Author_Institution :
Mesa Res. Inst., Twente Univ., Enschede, Netherlands
Abstract :
An efficient parallel pattern multiple-fault propagation (MFP) technique for the single stuck-at fault simulation in combinational circuits is presented. This technique is able to operate in conjunction with several existing fault simulation techniques, such as the parallel-pattern simulation and the fanout-free region concept. Experimental results have shown significant improvements in the simulation speed over the existing approaches. The fault simulator described adopts different simulation algorithms at different simulation stages to optimize the simulator performance
Keywords :
circuit analysis computing; combinatorial circuits; digital simulation; fault location; logic testing; parallel processing; combinational circuits; fanout-free region; multiple-fault propagation; parallel pattern; single stuck-at fault simulation; Acceleration; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Computational modeling; Electrical fault detection; Fault detection; Fault diagnosis; System testing;
Conference_Titel :
Test Symposium, 1992. (ATS '92), Proceedings., First Asian (Cat. No.TH0458-0)
Conference_Location :
Hiroshima
Print_ISBN :
0-8186-2985-1
DOI :
10.1109/ATS.1992.224432
