Title :
Design of A 7-bit, 200MS/s, 2mW pipelined ADC with switched open-loop amplifiers in a 65nm CMOS technology
Author :
Wulff, Carsten ; Ytterdal, Trond
Author_Institution :
Norwegian Univ. of Sci. & Technol., Trondheim
Abstract :
We present the design of a 7-bit 200 MS/s pipelined ADC with switched open-loop amplifiers in a 65 nm CMOS technology. As a result of turning off the open-loop amplifiers during sampling we reduce the power dissipation by 23%. The ADC achieves a SNDR of 40 dB close to the Nyquist frequency, with a power dissipation of 2 mW, which results in a Walden FOM of 0.13 pJ/step and a Thermal FOM of 1.6 fJ/step.
Keywords :
CMOS integrated circuits; amplifiers; pipeline processing; CMOS technology; Nyquist frequency; Thermal FOM; Walden FOM; pipelined ADC; power 2 mW; power dissipation; switched open-loop amplifiers; CMOS technology; Capacitors; Circuit noise; Frequency; Parasitic capacitance; Power dissipation; Sampling methods; Signal to noise ratio; Telecommunication switching; Turning;
Conference_Titel :
Norchip, 2007
Conference_Location :
Aalborg
Print_ISBN :
978-1-4244-1516-8
Electronic_ISBN :
978-1-4244-1517-5
DOI :
10.1109/NORCHP.2007.4481042
