Quiescent current testing of combinational circuits with bridging faults

Author

Roca, Miquel ; Rubio, Antonio

Author_Institution

Dept. of Phys., Univ. Illes Balears, Palma de Mallorca, Spain

fYear

1992

fDate

26-27 Nov 1992

Firstpage

64

Lastpage

69

Abstract

The authors present a classification of bridging faults in ISCAS combinational circuits and analyze the L_DDQ testability of this sort of faults. A procedure for test pattern generation is implemented and it is applied to these circuits. The problem of testing feedback bridging faults is also analyzed showing that this type of fault is also testable by I_DDQ even if they exhibit an oscillating behaviour. This result is verified through simulated and experimental data

Keywords

combinatorial circuits; digital simulation; electric current measurement; fault location; logic testing; CMOS; ISCAS combinational circuits; L_DDQ testability; bridging faults; global current; oscillating behaviour; quiescent current testing; test pattern generation; topology; voltage waveform analysis; Bridge circuits; CMOS digital integrated circuits; CMOS technology; Circuit analysis; Circuit faults; Circuit testing; Combinational circuits; Feedback circuits; Logic circuits; Test pattern generators;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1992. (ATS '92), Proceedings., First Asian (Cat. No.TH0458-0)

Conference_Location

Hiroshima

Print_ISBN

0-8186-2985-1

Type

conf

DOI

10.1109/ATS.1992.224437

Filename

224437