Qualification method for DRAM retention by leakage current evaluation using subthreshold characteristics of cell transistors

We suggested a new qualification method for DRAM retention property by evaluation of a cell transistor leakage current using the subthreshold characteristic parameters, V_th/S and dV_th/dV_BS. Correlation between the Leakage current Evaluation Parameter (LEP) which is obtained from the method and the retention time of the DRAM products was carried out. The result shows that the measurement limitation imposed by the extremely small cell transistor leakage current can be overcome by the new method, and provides quick feedbacks on the retention characteristics at the early stage of process integration and qualification cycles. During the correlation procedure, we also investigated on the statistical distribution of the retention time of the DRAM cells.