DocumentCode
3212028
Title
Different electrical measuring techniques of package and interconnect parasitics for high speed VLSI devices
Author
Huang, C.C. ; Wong, Florence ; Kim, Daniel
Author_Institution
VLSI Technol. Inc., San Jose, CA, USA
fYear
1994
fDate
11-13 Oct 1994
Firstpage
137
Lastpage
143
Abstract
This paper will discuss several measuring techniques that are used in the industry today for extraction of electrical parasitics of packages and interconnects. Specifically, the techniques that will be covered are the SEMI-Standard (G23-84) method, the impedance method, and the network analysis method. The data measured from these methods will be presented. Theoretical analysis and simulation results from software will be compared to discuss the advantages and disadvantages of each method
Keywords
VLSI; SEMI-Standard G23-84 method; electrical measuring techniques; electrical parasitics; high speed VLSI devices; impedance method; interconnects; network analysis method; packages; simulation software; Electric resistance; Electric variables measurement; Electrical resistance measurement; Electronics packaging; Equations; Impedance measurement; Inductance measurement; Parasitic capacitance; Velocity measurement; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Northcon/94 Conference Record
Conference_Location
Seattle, WA
Print_ISBN
0-7803-9995-1
Type
conf
DOI
10.1109/NORTHC.1994.643327
Filename
643327
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