DocumentCode :
3212082
Title :
Maximum distance testing
Author :
Xu, Shiyi ; Chen, Jianwen
Author_Institution :
Sch. of Comput. Sci., Shanghai Univ., China
fYear :
2002
fDate :
18-20 Nov. 2002
Firstpage :
15
Lastpage :
20
Abstract :
Random testing has been used for years in both software and hardware testing. It is well known that in random testing each test requires to be selected randomly regardless of the tests previously generated. However, random testing could be inefficient for its random selection of test patterns. This paper, based on random testing, introduces the concept of Maximum Distance Testing (MDT) for VLSI circuits in which the total distance among all test patterns is chosen maximal so that the set of faults detected by one test pattern is as different as possible from that of faults detected by the tests previously applied. The procedure for constructing a Maximum Distance Testing Sequence (MDTS) is described in detail. Experimental results on Benchmark as well as other circuits are also given to evaluate the performances of our new approach.
Keywords :
VLSI; automatic test pattern generation; digital integrated circuits; integrated circuit testing; logic testing; random sequences; Cartesian distance; Hamming distance; VLSI circuits; fault coverage; maximum distance testing sequence; random testing; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian
ISSN :
1081-7735
Print_ISBN :
0-7695-1825-7
Type :
conf
DOI :
10.1109/ATS.2002.1181678
Filename :
1181678
Link To Document :
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