A testing scheme for crosstalk faults based on the oscillation test signal [VLSI]

Author

Wu, Ming Shae ; Lee, Chung Len ; Chang, Chi Peng ; Chen, Jwu E.

Author_Institution

Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsin-Chu, Taiwan

fYear

2002

fDate

18-20 Nov. 2002

Firstpage

170

Lastpage

175

Abstract

A test scheme for crosstalk faults, based on an oscillation signal, is proposed. It uses an oscillation signal applied to an affecting line and detects induced pulses on a victim line if a crosstalk fault exists between these two lines. It is simple and eliminates the complicated timing issues during test generation for crosstalk faults in conventional approaches. The test generation and fault simulation based on the scheme are described. Experimental results are also presented to show the described test generation procedure is effective in generating test patterns for this scheme.

Keywords

VLSI; circuit simulation; fault simulation; integrated circuit interconnections; integrated circuit modelling; integrated circuit testing; interference (signal); logic simulation; logic testing; VLSI crosstalk faults; VLSI oscillation test signal based testing; affecting lines; fault simulation; inter-line crosstalk faults; test generation timing issues; test pattern generation; victim line induced pulses; Circuit faults; Circuit simulation; Circuit testing; Crosstalk; Electrical fault detection; Fault detection; Pattern analysis; Pulse circuits; Test pattern generators; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian

ISSN

1081-7735

Print_ISBN

0-7695-1825-7

Type

conf

DOI

10.1109/ATS.2002.1181706

Filename

1181706