DocumentCode :
3212636
Title :
DSP acceleration using a reconfigurable FPGA
Author :
Kramberger, Iztok
Author_Institution :
Fac. of Electr. Eng. & Comput. Sci., Maribor Univ., Slovenia
Volume :
3
fYear :
1999
fDate :
1999
Firstpage :
1522
Abstract :
Programmable logic offers an alternative solution for the computationally-intensive functions found in digital signal processing (DSP). Programmable logic can provide increased DSP system performance at reduced system cost. Programmable logic combines the flexibility of a general purpose DSP plus the speed, density, and low cost of an ASIC implementation. In some applications, programmable logic replaces the DSP processor entirely. In others, programmable logic works in conjunction with the DSP processor, offloading the computationally-intensive function and freeing the processor for other functions. This paper describes an alternative to traditional, general-purpose DSP processors. Programmable logic can implement functions beyond the capabilities of today´s DSP processors. Field programmable gate arrays (FPGAs) or complex programmable logic devices (CPLDs) potentially provide performance increases of an order of magnitude over traditional DSPs with the same flexibility
Keywords :
digital signal processing chips; field programmable gate arrays; programmable logic devices; ASIC implementation; DSP acceleration; DSP system performance; complex programmable logic devices; computationally-intensive functions; digital signal processing; programmable logic; reconfigurable FPGA; Acceleration; Application specific integrated circuits; Costs; Digital signal processing; Field programmable gate arrays; Logic devices; Programmable logic arrays; Programmable logic devices; Reconfigurable logic; System performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Electronics, 1999. ISIE '99. Proceedings of the IEEE International Symposium on
Conference_Location :
Bled
Print_ISBN :
0-7803-5662-4
Type :
conf
DOI :
10.1109/ISIE.1999.797022
Filename :
797022
Link To Document :
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