DocumentCode :
3212648
Title :
Efficient circuit specific pseudoexhaustive testing with cellular automata
Author :
Chattopadhyay, Santanu
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., India
fYear :
2002
fDate :
18-20 Nov. 2002
Firstpage :
188
Lastpage :
193
Abstract :
Pseudoexhaustive testing of a combinational circuit involves applying all possible input patterns to all its individual output cones. Since it does not assume any fault model, the testing ensures detection of all static detectable faults in the circuit that do not require two-pattern tests. Earlier works on pseudoexhaustive testing usually generate test sets that are several orders of magnitude larger than the minimum size test set required for a specific circuit, and are mostly based on LFSRs. This paper presents a novel strategy for constructing circuit-specific pseudoexhaustive test pattern generators, based on cellular automata, that result in generating minimal pseudoexhaustive test sets for combinational circuits. Experimentation with ISCAS85 benchmarks show that as compared to the LFSRs, the cellular automata based approach often results in simpler circuitry with lesser number of shift stages and reduced test length. Moreover, the analytical technique developed here is generic in nature and thus can also be applied for constructing LFSR based pseudoexhaustive test pattern generators.
Keywords :
automatic test pattern generation; cellular automata; combinational circuits; integrated circuit design; integrated circuit modelling; integrated circuit testing; logic design; logic testing; shift registers; LFSR; cellular automata; circuit input patterns; circuit output cones; circuit-specific pseudoexhaustive testing; combinational circuits; fault detection; fault models; minimum size test set generation; shift stage number; static detectable faults; test length reduction; test pattern generators; two-pattern tests; Automatic test pattern generation; Automatic testing; Benchmark testing; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Pattern analysis; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian
ISSN :
1081-7735
Print_ISBN :
0-7695-1825-7
Type :
conf
DOI :
10.1109/ATS.2002.1181709
Filename :
1181709
Link To Document :
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