Fault set partition for efficient width compression

In this paper, we present a technique for reducing the test length of counter-based pseudo-exhaustive built-in self-testing (BIST) using a width compression method and a divide-and-conquer strategy. More formally, the target faults are divided into K groups such that a binary counter can generate a test set for each group. By selecting the size of the binary counter, this technique allows a trade-off between test application time and area overhead. The experimental results for the ISCAS´85 and ISCAS´89 benchmark circuits demonstrate the efficiency of the proposed technique. In all cases, this low-overhead BIST technique achieves complete fault coverage of the stuck-at faults in reasonable test application time.