DocumentCode
3213556
Title
Nanoscale SOI MOSFETs with double step buried oxide: A novel structure for suppressed self-heating effects
Author
Heydari, Sara ; Orouji, Ali A. ; Fathipour, Morteza
Author_Institution
Electr. & Comput. Eng. Dept., Semnan Univ., Semnan, Iran
fYear
2008
fDate
14-17 Dec. 2008
Firstpage
224
Lastpage
227
Abstract
Design consideration for an 80 nm channel length SOI MOSFET employing double step buried oxide (DSBO) is presented. The electrical characteristics and temperature distribution are analyzed and compared with conventional silicon-on-insulator (C-SOI) MOSFETs. The DSBO devices are shown to have better leakage and subthreshold characteristics. Furthermore, the channel temperature is reduced during high-temperature operation and drain current increase suggesting that DSBO can mitigate the self-heating penalty effectively. Our study suggests that DSBO is a suitable alternative to silicon dioxide as the buried dielectric in SOI, and expands the application of SOI to high temperature.
Keywords
MOSFET; buried layers; nanoelectronics; silicon-on-insulator; temperature distribution; C-SOI; DSBO; Si; buried dielectric; conventional silicon-on-insulator; double step buried oxide; leakage characteristics; nanoscale SOI MOSFET; self-heating effects; size 80 nm; subthreshold characteristics; temperature distribution; Dielectrics and electrical insulation; Doping; MOSFETs; Parasitic capacitance; Poisson equations; Silicon compounds; Silicon on insulator technology; Substrates; Temperature distribution; Thermal conductivity; SOI-MOSFET; Self-heating effect; Simulation; Temperature distribution;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2008. ICM 2008. International Conference on
Conference_Location
Sharjah
Print_ISBN
978-1-4244-2369-9
Electronic_ISBN
978-1-4244-2370-5
Type
conf
DOI
10.1109/ICM.2008.5393504
Filename
5393504
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