DocumentCode :
3214199
Title :
VT Adjustment by Leff Engineering for LSTP Single Gate Work-function CMOS FinFET Technology
Author :
Varadarajan, V. ; Tsu-Jae King Liu
Author_Institution :
Univ. of California
fYear :
2006
fDate :
25-28 June 2006
Firstpage :
155
Lastpage :
158
Abstract :
Engineering of the electrical channel length (Leff) is investigated as an alternative means for adjusting the threshold voltage (Vtau) in double-gate (DG) MOSFETs, to allow a single mid-gap work function gate material to be used with undoped CMOS channels. Device simulations for 18 nm gate length (LG) indicate that ITRS performance specifications for low standby power (LSTP) applications can be met with this approach. Different source/drain (S/D) doping profiles yielding the same Leff can be used to achieve the desired Vtau, allowing for flexibility in process design.
Keywords :
CMOS integrated circuits; MOSFET; low-power electronics; semiconductor doping; CMOS channels; FinFET; ITRS performance specifications; LSTP single gate work-function technology; double-gate MOSFET; electrical channel length; low standby power; size 18 nm; source/drain doping; threshold voltage; CMOS technology; Doping profiles; FETs; FinFETs; Immune system; Ion implantation; MOS devices; MOSFETs; Process design; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 2006 16th Biennial
Conference_Location :
San Jose, CA
ISSN :
0749-6877
Print_ISBN :
1-4244-0267-0
Type :
conf
DOI :
10.1109/UGIM.2006.4286372
Filename :
4286372
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3214199
بازگشت