• DocumentCode
    3214796
  • Title

    Cydra 5 directed dataflow architecture

  • Author

    Rau, B. Ramakrishna

  • Author_Institution
    Cydrome Inc., Milpitas, CA, USA
  • fYear
    1988
  • fDate
    Feb. 29 1988-March 3 1988
  • Firstpage
    106
  • Lastpage
    113
  • Abstract
    A description is given of a balanced and functionality complete minisupercomputer called the Cydra 5 Departmental Supercomputer. The Cydra 5 makes extensive use of industry standards, such as AT&T Unix System V.3, ANSI Fortran 77, and the IEEE 754 floating-point standard, to take advantage of customers´ investments in applications software. The open architecture of the Cydra 5, including the use of the VME bus, makes it an attractive platform for system integrators. It offers the following features: Directed Dataflow (Cydrome proprietary architecture), compiler optimizing technology, high-speed memory with guaranteed bandwidth, tightly integrated multiple optimized processors, parallel processing, and a parallelized Unix-compatible operating system.<>
  • Keywords
    parallel processing; ANSI Fortran 77; AT&T Unix System V.3; Cydra 5 directed dataflow architecture; IEEE 754 floating-point standard; VME bus; applications software; compiler optimizing technology; high-speed memory; parallel processing; parallelized Unix-compatible operating system; tightly integrated multiple optimized processors; ANSI standards; Application software; Bandwidth; Computer architecture; Computer industry; Investments; Optimizing compilers; Parallel processing; Software standards; Supercomputers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compcon Spring '88. Thirty-Third IEEE Computer Society International Conference, Digest of Papers
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-8186-0828-5
  • Type

    conf

  • DOI
    10.1109/CMPCON.1988.4840
  • Filename
    4840