• DocumentCode
    3216221
  • Title

    A sampling weak-program method to tighten Vth-distribution of 0.5 V for low-voltage flash memories

  • Author

    Shiga, H. ; Tanzawa, T. ; Umezawa, A. ; Taura, T. ; Miyaba, T. ; Saito, M. ; Kitamura, S. ; Mori, S. ; Atsumi, S.

  • Author_Institution
    Lab. of Microelectron. Eng., Toshiba Corp., Yokohama, Japan
  • fYear
    1999
  • fDate
    17-19 June 1999
  • Firstpage
    33
  • Lastpage
    36
  • Abstract
    Recently, it has become increasingly important to lower the supply voltage of fast access time NOR flash EEPROMs for a low power handheld digital equipment. In order to scale the boosted word-line voltage for reading memory data with low power supply, it is necessary to tighten the erased-Vth distribution. The self-convergence method has been proposed to tighten the Vth-distribution within 2 V. However, it´s not available to tighten the width below 1 V due to the high power consumption and long converging time. Therefore, the bit-by-bit weak program after over-erase-verify is needed. This paper shows a problem of the bit-by-bit weak program and proposes a sampling method of weak program for a solution, which can achieve 0.5 V in the Vth-distribution width, resulting in lowering the word-line voltage for less than 1.5 V operation.
  • Keywords
    flash memories; low-power electronics; 0.5 V; NOR flash EEPROM; boosted word-line voltage; low power handheld digital equipment; low-voltage flash memory; over-erase-verify; sampling weak program method; threshold voltage distribution; Counting circuits; EPROM; Flash memory; Laboratories; Microelectronics; Optimization methods; Power engineering and energy; Sampling methods; Temperature dependence; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    4-930813-95-6
  • Type

    conf

  • DOI
    10.1109/VLSIC.1999.797226
  • Filename
    797226