DocumentCode
3216523
Title
A SAT-based implication engine for efficient ATPG, equivalence checking, and optimization of netlists
Author
Tafertshofer, P. ; Ganz, A. ; Henftling, M.
Author_Institution
Inst. of Electron. Design Autom., Tech. Univ. Munchen, Germany
fYear
1997
fDate
9-13 Nov. 1997
Firstpage
648
Lastpage
655
Abstract
The paper presents a flexible and efficient approach to evaluating implications as well as deriving indirect implications in logic circuits. Evaluation and derivation of implications are essential in ATPG, equivalence checking, and netlist optimization. Contrary to other methods, the approach is based on a graph model of a circuit´s clause description called implication graph. It combines both the flexibility of SAT-based techniques and high efficiency of structure based methods. As the proposed algorithms operate only on the implication graph, they are independent of the chosen logic. Evaluation of implications and computation of indirect implications are performed by simple and efficient graph algorithms. Experimental results for various applications relying on implication demonstrate the effectiveness of the approach.
Keywords
automatic testing; circuit optimisation; computability; fault diagnosis; logic CAD; logic testing; SAT-based implication engine; circuit clause description; efficient ATPG; equivalence checking; graph algorithms; graph model; implication evaluation; implication graph; indirect implications; logic circuits; netlist optimization; structure based methods; Automatic testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1997. Digest of Technical Papers., 1997 IEEE/ACM International Conference on
Conference_Location
San Jose, CA, USA
ISSN
1092-3152
Print_ISBN
0-8186-8200-0
Type
conf
DOI
10.1109/ICCAD.1997.643607
Filename
643607
Link To Document