DocumentCode :
3216868
Title :
A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-/spl mu/m CMOS technology
Author :
Lam, C. ; Razavi, B.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear :
1999
fDate :
17-19 June 1999
Firstpage :
117
Lastpage :
120
Abstract :
This paper describes the design of a CMOS frequency synthesizer targeting wireless local area network applications in the 5 GHz range. Based on an integer-N architecture, the synthesizer produces a 5.2 GHz output as well as the quadrature phases of a 2.6 GHz carrier. Fabricated in a 0.4 /spl mu/m digital CMOS technology, the circuit provides a channel spacing of 23 MHz at 5.2 GHz while exhibiting a phase noise of -115 dBc/Hz at 2.6 GHz and -100 dBc/Hz at 5.2 GHz at 10 MHz offset. The reference sidebands are at -50 dBc at 2.6 GHz and the power dissipation from a 2.6 V supply is 47 mW.
Keywords :
CMOS integrated circuits; frequency synthesizers; mixed analogue-digital integrated circuits; phase noise; wireless LAN; 0.4 micron; 2.6 GHz; 2.6 V; 47 mW; 5.2 GHz; CMOS technology; VCO; WLAN; frequency synthesizer; integer-N architecture; phase noise; quadrature phases; wireless LAN applications; wireless local area network; CMOS digital integrated circuits; CMOS technology; Channel spacing; Charge pumps; Filters; Frequency conversion; Frequency synthesizers; Transceivers; Voltage-controlled oscillators; Wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1999. Digest of Technical Papers. 1999 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-930813-95-6
Type :
conf
DOI :
10.1109/VLSIC.1999.797256
Filename :
797256
Link To Document :
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